9 hours ago
Responsibilities
- Lead the technical design, architecture, and implementation of high-performance test generators and verification frameworks.
- Design and implement automation for ASIC and SoC EDA-flow bottlenecks, including pseudo-random stimulus generation and constraint-solving methods.
- Collaborate with hardware teams to prototype and deploy scalable test-generator tools for chip development.
- Participate in or lead design reviews and evaluate technologies for advanced verification.
- Triage, debug, track, and resolve product or system issues affecting hardware, simulation performance, service operations, and quality.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of software development experience in one or more programming languages, including data structures and algorithms.
- Experience with hardware verification, developer tools, or test generators and exercisers for ASICs and SoCs.
- Experience testing, maintaining, or launching software or hardware products.
- Experience with software design and architecture, including leading technical projects.
- Preferred: master’s degree or PhD emphasizing computer architecture.
- Preferred: experience with high-performance systems, debugging, SystemVerilog, UVM, chip design, EDA tools and flows, object-oriented programming, and constraint solvers.
- Ability to bridge software engineering and hardware verification disciplines.
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