1 day ago
Palo Alto, CA, USAIntern
Responsibilities
- Develop an ML Compiler that maps autonomy machine learning models to the Rivian Autonomy Processor (RAP1).
- Implement hardware-aware optimizations including quantization strategies, model compression, memory-efficient representations, and operator fusion.
- Collaborate with hardware teams on model architecture and compute-pipeline co-optimization under latency, throughput, and power constraints.
- Benchmark and analyze system performance across platforms to improve deployment efficiency.
- Partner with autonomy teams to align model optimization with hardware roadmaps and real-world autonomy requirements.
- Help bring up new hardware and add compiler support for hardware features.
Requirements
- Must be currently pursuing a master’s or PhD degree at an accredited university.
- Must be pursuing Computer Engineering or a closely related degree.
- Excellent C/C++ and Python programming skills.
- Experience with system-on-chip platforms used for machine learning.
- Strong understanding of deep learning software models.
- Experience in compiler pipeline development is preferred.
- Proficiency with deep learning frameworks and their low-level intermediate representations or export formats.
Benefits
- The Spring 2027 co-op runs from January through August 2027 and requires onsite, full-time availability for the entire duration.
- Benefits include paid vacation, paid sick leave, and medical insurance benefits.
- Internship positions are not eligible for retirement benefits.
Categories
About Rivian
Rivian designs and manufactures electric vehicles, including the R1T pickup, R1S SUV, and commercial delivery vans, selling directly to consumers and fleet operators. Founded in 2009 and headquartered in Irvine, California, it operates a manufacturing plant in Normal, Illinois, and is publicly traded on NASDAQ. The company also develops in-vehicle software and electrical architecture and offers charging and service support for its owners.