CAD Engineering Intern
Rambus, Inc.1 day ago
San Jose, CA, USAIntern
Responsibilities
- Develop, maintain, and enhance CAD methodologies and automation flows for digital ASIC design, verification, and implementation.
- Use EDA tools for formal verification, synthesis, static timing analysis, and power analysis to improve design quality and flow efficiency.
- Develop Python, Tcl, and shell-based scripts and utilities to automate workflows, analyze results, and streamline engineering processes.
- Explore AI-assisted solutions, LLMs, RAG, and AI agents for engineering data analysis, debugging, and workflow automation.
- Build and integrate AI-enabled utilities with engineering tools and assess their accuracy, reliability, performance, and effectiveness.
- Collaborate with CAD, design, verification, and physical design teams to translate engineering needs into technical solutions.
- Gain exposure to place and route, physical verification, DRC/LVS, and related implementation and signoff flows.
Requirements
- Currently pursuing a Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- Understanding of digital logic design, RTL, and ASIC/SoC design fundamentals.
- Familiarity with logic synthesis, static timing analysis, power analysis, or related digital implementation methods.
- Programming or scripting experience in Python, Tcl, Bash, or similar languages.
- Familiarity with Linux environments, debugging, software development fundamentals, and version control.
- Strong analytical, debugging, problem-identification, problem-solving, independent-work, and collaboration skills.
- Interest in applying automation and emerging AI technologies to engineering problems.
- Willingness to take the lead on work, decisions, actions, and consequences.
- Preferred hands-on experience with Synopsys, Cadence, or Siemens EDA tools.
- Preferred understanding of timing constraints, timing closure, power optimization, and PPA tradeoffs.
- Preferred exposure to place and route, formal verification, physical verification, DRC/LVS, or related signoff methodologies.
- Preferred experience with LLMs, RAG, AI agents, agentic automation, Python-based tools, MCPs, APIs, or automation frameworks.
Benefits
- Flexible hybrid work environment with an average expectation of at least three days per week onsite in San Jose and up to two days remote.
- Competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, medical and dental benefits, paid time off, and gym membership.
- Full-time internship position with an hourly compensation range of $25.80 to $47.80.
About Rambus, Inc.
Rambus, Inc. designs and sells memory interface chips and licenses silicon IP for memory, interconnect, and security to semiconductor and system companies. Its portfolio includes DDR5 server parts such as RCD/CKD buffers and PMICs, plus IP cores for memory controllers, CXL and cryptography. Founded in 1990 and headquartered in San Jose, it is a NASDAQ-listed public company serving data center, AI, and high-performance computing markets.