2 months ago
San Jose, CA, USAStaff+
Responsibilities
- Lead the design and implementation of production-quality Rust components for low-level, performance-sensitive GPU systems.
- Establish Rust as a first-class language across GPU software through toolchain integration, libraries, coding standards, diagnostics, testing, and deployment practices.
- Design compiler pipelines and target-specific transformations involving rustc, MIR, MLIR, LLVM IR, and AMDGPU code generation.
- Build analyses, legalization passes, lowering, ABI definitions, validation methods, and interfaces across compilers, runtimes, firmware, and hardware.
- Develop bare-metal and no-std Rust components with bounded behavior, fail-closed handling, and predictable hardware effects.
- Use fuzzing, property-based testing, differential execution, executable models, and hardware validation to identify semantic gaps and regressions.
- Apply program analysis and formal methods to establish invariants, refinement obligations, and trusted boundaries.
- Lead technical reviews, mentor engineers, write design documents, explain complex systems behavior, and evaluate emerging compiler and verification technologies.
Requirements
- Strong production Rust experience, including ownership, borrowing, lifetimes, traits, generics, error handling, concurrency, FFI, and safe abstractions over unsafe operations.
- Experience with low-level or constrained Rust, such as no-std systems, embedded software, firmware, custom targets, allocators, volatile access, interrupt handling, or architecture-specific code.
- Strong C or C++ systems programming skills and experience working across mixed-language codebases.
- Experience with compiler internals or infrastructure, including rustc, MIR, custom code-generation backends, procedural macros, compiler plugins, LLVM, MLIR, GCC, or related frameworks.
- Experience with intermediate representations, compiler analyses, optimization and legalization passes, instruction selection, scheduling, or target-specific code generation.
- Understanding of compiler correctness, undefined behavior, aliasing, provenance, layout, calling conventions, memory models, and source-to-target semantic preservation.
- Ability to reason about assembly, ISA encodings, compiler output, and machine-level execution.
- Experience with linkers, loaders, ELF or other object formats, code-object metadata, DWARF, LLVM MC, disassembly, post-link analysis, or binary rewriting.
- Understanding of GPU execution models, memory spaces, synchronization, atomics, barriers, caches, and asynchronous operations.
- Experience with AMDGPU, GCN, RDNA, CDNA, ROCm, HIP, HSA, or the AMDGPU LLVM backend is preferred.
- Experience with GPU runtimes, drivers, firmware, embedded processors, device initialization, command processing, queueing, or hardware control paths is preferred.
- Experience with secure or high-assurance systems, program analysis, formal verification, executable specifications, or hardware-software co-design is preferred.
- Strong validation instincts, including adversarial, differential, property-based, and reproducible testing.
- Technical leadership experience involving direction-setting, cross-layer problem solving, partner-team influence, mentoring, and communication.
Benefits
- Hybrid work arrangement in San Jose, CA.
- AMD benefits are offered as described in the company’s benefits overview.
- This role is not eligible for visa sponsorship.
About AMD
AMD designs and sells CPUs, GPUs, and adaptive/embedded computing products for PCs, data centers, gaming, and edge devices. Its portfolio includes Ryzen and EPYC processors, Radeon and Instinct graphics, and adaptive SoCs from its Xilinx acquisition, sold to OEMs, cloud providers, and device makers. Founded in 1969 and headquartered in Santa Clara, it is a public company on NASDAQ and supplies semi-custom chips for major game consoles.