1 day ago
Responsibilities
- Lead the design and implementation of production-quality Rust components for low-level, performance-sensitive GPU systems.
- Establish Rust usage across GPU toolchains, libraries, diagnostics, testing, coding standards, and deployment practices.
- Design compiler pipelines involving rustc, MIR, intermediate representations, MLIR, LLVM IR, and AMDGPU code generation.
- Develop GPU analyses, transformations, legalization passes, target-specific lowering, and execution-model support.
- Define and validate interfaces across compilers, host runtimes, device code, firmware, and hardware, including ABIs, calling conventions, linkers, loaders, and binary metadata.
- Develop bare-metal and no-std Rust components with bounded behavior and predictable hardware effects.
- Use testing, fuzzing, property-based testing, differential execution, executable models, and hardware validation to prevent regressions.
- Apply program analysis and formal methods to source-level invariants, state-machine properties, refinement obligations, and trusted boundaries.
- Partner across compiler, runtime, firmware, architecture, validation, security, and performance teams.
- Write design documents, lead technical reviews, mentor engineers, and communicate complex language, compiler, and hardware behavior.
- Evaluate and integrate compiler and verification technologies that improve safety, performance, maintainability, or development velocity.
Requirements
- Strong production Rust experience, including ownership, borrowing, lifetimes, traits, generics, error handling, concurrency, FFI, and safe abstractions over unsafe operations.
- Experience with low-level or constrained Rust, such as no-std, embedded systems, firmware, custom targets, allocators, volatile access, interrupt handling, or architecture-specific code.
- Strong C or C++ systems programming skills and experience working across mixed-language codebases.
- Experience with rustc internals, MIR, custom code generation backends, procedural macros, compiler plugins, or Rust toolchain infrastructure.
- Experience with LLVM, MLIR, GCC, or another production compiler framework.
- Experience designing intermediate representations, dialects, analyses, optimization passes, legalization, instruction selection, scheduling, or target-specific code generation.
- Understanding of compiler correctness, undefined behavior, aliasing, provenance, layout, calling conventions, memory models, and source-to-target semantic preservation.
- Ability to reason about low-level assembly, ISA encodings, compiler output, and machine-level execution.
- Experience with linkers, loaders, ELF or other object formats, code-object metadata, DWARF, LLVM MC, disassembly, post-link analysis, or binary rewriting.
- Understanding of GPU execution models, address spaces, registers, memory, synchronization, atomics, barriers, and asynchronous operations.
- Experience with AMDGPU, GCN, RDNA, CDNA, ROCm, HIP, HSA, or the AMDGPU LLVM backend.
- Experience with GPU runtimes, drivers, firmware, embedded processors, device initialization, command processing, queueing, or hardware control paths.
- Experience building secure or high-assurance systems across privilege, memory-isolation, or hardware trust boundaries.
- Experience with program analysis, abstract interpretation, symbolic execution, model checking, SMT solvers, or formal verification tools such as Verus, Lean, Coq, Isabelle, Dafny, or TLA+.
- Experience writing executable specifications, proving state-machine invariants, or validating refinement across source, IR, binaries, simulators, RTL, and hardware.
- Strong validation experience with adversarial testing, differential testing, property-based testing, fuzzing, reproducible evidence, assumptions, and counterexamples.
- Hardware-software co-design experience involving ISA features, compiler-visible architecture, memory systems, synchronization, security mechanisms, or specialized compute pipelines.
- Technical leadership experience setting direction, resolving cross-layer problems, influencing partner teams, mentoring engineers, and communicating tradeoffs.
- Bachelor’s, master’s, or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related field, or equivalent industry experience; research publications and advanced degrees are welcome but not required.
Benefits
- AMD benefits are available as described in its benefits-at-a-glance materials.
- Hybrid role located in San Jose, California.
- This role is not eligible for visa sponsorship.
About AMD
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_