1 day ago
Hyderābād, IndiaMid Level
Responsibilities
- Create complex RTL and digital designs.
- Debug place-and-route issues and work toward timing closure.
- Apply knowledge of RTL coding styles, static timing analysis, timing constraints, and place-and-route algorithms and applications.
- Develop and enhance EDA/CAD flows and related software capabilities.
Requirements
- BS or MS in Electrical Engineering or Computer Engineering.
- 2–3 years of experience in digital design and static timing analysis.
- Strong background in RTL design using Verilog or VHDL.
- Strong exposure to timing-closure concepts, timing analysis, and digital design foundations.
- Preferred scripting experience with TCL, Perl, or Python.
- Preferred familiarity with EDA tools and flows, Linux, and modern software development tools and techniques.
- Good analytical and problem-solving skills.
About AMD
AMD designs and sells CPUs, GPUs, and adaptive/embedded computing products for PCs, data centers, gaming, and edge devices. Its portfolio includes Ryzen and EPYC processors, Radeon and Instinct graphics, and adaptive SoCs from its Xilinx acquisition, sold to OEMs, cloud providers, and device makers. Founded in 1969 and headquartered in Santa Clara, it is a public company on NASDAQ and supplies semi-custom chips for major game consoles.