Cadence Design Systems
Cadence Design Systems builds electronic design automation (EDA) software, emulation/acceleration hardware, and reusable IP that help semiconductor and systems companies design, verify, and implement chips and electronic systems. It also develops computational engineering tools, including computational fluid dynamics and molecular modeling for drug discovery. Founded in 1988 and headquartered in San Jose, California, Cadence is a public company listed on NASDAQ under the ticker CDNS.
Open Positions at Cadence Design Systems
103 open positions
Join Cadence’s Innovus placement team in Korea as a Software Engineer II developing and maintaining digital design placement software. The role emphasizes C/C++ programming, algorithmic problem-solving, and Unix/Linux debugging.
Join Cadence’s Innovus placement team in Korea as a Software Engineer I, developing and maintaining digital design placement software. The role emphasizes C/C++ programming, Unix/Linux debugging, algorithms, and optimization.
Lead Software Engineer responsible for owning the end-to-end design, formal verification, validation, and delivery of assertion-based verification IPs for industry-standard protocols. The role combines RTL and SystemVerilog development, formal verification, automation, and technical mentorship.
Lead Software Engineer developing high-performance routing and physical synthesis technologies for advanced digital IC design. The role focuses on C/C++ algorithms, multi-threaded systems, and scalable Linux software for semiconductor design flows.
Lead Application Engineer supporting defense customers by proposing and coordinating Cadence CAE software solutions for structural, fluid, and multibody analysis. The role combines technical pre-sales, customer needs assessment, and coordination with sales, engineering, and external technical teams.
Develop low-level firmware for Cadence’s DDR5 PHY IP using microcontrollers, bare-metal C, and hardware simulation environments. The role combines firmware implementation, training algorithms, verification collaboration, and silicon bring-up.
Cadence is seeking a Sr. Principal Engineer to build, test, troubleshoot, and improve sophisticated C++ software while contributing to system architecture and code quality. The role focuses on desktop engineering, OpenGL, computational techniques, and reliable software development across major operating systems.
Lead Software Engineer developing and optimizing physical verification software for Cadence’s Quantus Extraction Solution group. The role combines C++/Python programming, algorithmic performance work, debugging, and collaboration on complex semiconductor design databases.
Lead Software Engineer in Test responsible for building robust manual and automated testing solutions across UI, API, functional, regression, integration, end-to-end, and performance testing. The role also applies AI-assisted and agentic workflows to improve test generation, maintenance, and execution.
Lead the architecture and development of advanced meshing capabilities for Cadence’s MSC Apex CAE platform. As a principal-level technical authority, you will shape meshing algorithms, performance, quality, and engineering direction while mentoring engineers across teams.
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