Cadence Design Systems
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.
Open Positions at Cadence Design Systems
11 open positions
Graduate Student Intern - Software Engineering will research and prototype AI/ML methods for geometry modeling, mesh generation, and topology optimization in engineering and simulation workflows. The role combines software development with applied research using LLMs, generative AI, and graph-based techniques.
Graduate Student Intern - Software Engineering will research and prototype AI/ML methods for geometry modeling, mesh generation, and topology optimization in engineering and simulation workflows. The role combines software development with applied research involving LLMs, generative AI, and graph neural networks.
Lead Product Engineer responsible for advancing Cadence Genus synthesis software for high-performance digital ASIC design. The role combines product engineering, logic synthesis and timing-closure expertise, customer support, interoperability validation, and collaboration with R&D.
Lead software engineer role on Cadence’s R&D team developing and validating the Hardware Job Scheduler for the Palladium hardware emulation platform. The work combines Python/Linux development, performance analysis, bug resolution, and hardware-verification tooling.
Build full-stack developer tooling for Cadence’s Tensilica processor products, spanning Eclipse-based IDE components, web applications, APIs, databases, and automated testing. The role also explores integrating Agentic AI workflows into products used by processor designers and developers.
Intern supporting Cadence’s digital backend EDA flow through Innovus regression review and scripting-based infrastructure development. The role offers hands-on exposure to chip design tools, system development, and physical implementation workflows.
Lead the design and development of reusable C/C++/Python software components for geometry, visualization, and simulation products at Cadence. The role combines technical ownership, architecture, test automation, and build/release engineering.
Serve as a Product Engineering Architect supporting Cadence’s digital chip-design software, using RTL-to-GDSII, place-and-route, timing-closure, and PPA-optimization expertise. The role partners with customers, R&D, application engineering, and product marketing to resolve issues and develop innovative implementation flows.
Cadence is hiring a Software Engineer II to develop clock-tree synthesis algorithms and technology for the Innovus place-and-route tool in Belo Horizonte. The role combines C++ and Tcl development, algorithmic innovation, debugging, testing, and software performance improvements.
Lead advanced silicon signoff methodology development, customer enablement, and deployment for Cadence timing signoff and ECO solutions. This senior technical leadership role partners with customers, R&D, and field engineering to solve complex design-closure challenges through tapeout.
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