Sr Principal Software Engineer
Cadence Design Systems8 days ago
Bengaluru, IndiaStaff+
Responsibilities
- Analyze customer problems and requests, debug issues, and implement fixes.
- Develop new features and enhancements to improve synthesis results for timing, area, and power.
- Write, update, and optimize register-transfer level code using VHDL or Verilog.
- Run functional simulations using Xcelium, static timing analysis, and design-for-test checks.
- Validate, test, and investigate simulator performance and accuracy issues.
- Support and mentor application and product engineers in the EDA domain.
Requirements
- 12–16 years of experience.
- BE/BTech/ME/MTech in Computer Science or another relevant field.
- Hands-on experience with RTL coding.
- Ability to write, update, and optimize RTL code using VHDL or Verilog according to System Design Guide standards.
- Experience running functional simulations, static timing analysis, and design-for-test checks.
- Ability to validate, test, and investigate simulator performance and accuracy issues.
- Knowledge of Design-for-Test or Memory-Built-In-Self-Test is a plus.
Categories
About Cadence Design Systems
Cadence Design Systems builds electronic design automation (EDA) software, emulation/acceleration hardware, and reusable IP that help semiconductor and systems companies design, verify, and implement chips and electronic systems. It also develops computational engineering tools, including computational fluid dynamics and molecular modeling for drug discovery. Founded in 1988 and headquartered in San Jose, California, Cadence is a public company listed on NASDAQ under the ticker CDNS.