Sr. Staff Engineer, IP Runtime
Tenstorrent6 hours ago
Responsibilities
- Define runtime architecture and implementation for execution, scheduling, synchronization, and resource management across custom processors, accelerators, memory, and data-movement IP.
- Build low-level runtime components that initialize hardware IP, dispatch work, coordinate dependencies, and manage resources.
- Design runtime interfaces and data-movement paths for efficient and predictable memory access, synchronization, and execution.
- Analyze runtime and hardware/software bottlenecks and drive improvements in latency, throughput, scalability, and reliability.
- Perform hands-on design, coding, performance analysis, hardware bring-up, and debugging.
- Collaborate with hardware, firmware, compiler, systems, customer, and field-facing teams and mentor other engineers.
Requirements
- Expertise in C or C++ and a track record designing and delivering complex, performance-critical systems.
- Experience working close to hardware in low-level, embedded, bare-metal, or accelerator environments.
- Ability to translate hardware specifications into reliable software behavior.
- Strong understanding of command execution, scheduling, synchronization, memory movement, resource management, and parallelism.
- Skill in end-to-end debugging and optimization at the hardware/software boundary.
- Technical leadership, cross-functional collaboration, and mentoring experience.
Benefits
- Hybrid work arrangement based in Toronto, Ontario or Austin, Texas.
- Competitive compensation package and benefits.
- Compensation is stated to include base and variable compensation targets.
- Employment is contingent on eligibility to access U.S. export-controlled technology and may require citizenship, permanent residency, or prior export-license approval.
About Tenstorrent
Tenstorrent builds AI compute hardware and RISC‑V CPU technology for companies developing training and inference workloads in data centers and at the edge. The business sells accelerator cards and systems with a full software stack, and licenses RISC‑V CPU IP. Founded in 2016 and headquartered in Toronto, it is privately held and led by semiconductor architect Jim Keller.