Virtual Prototype Engineer (SystemC/TLM) - REQ_3003
Tessolve Semiconductor Private Limited1 day ago
Bengaluru, India or Hyderābād, IndiaSenior
Responsibilities
- Create Virtual Development Kits using Synopsys Virtualizer and Synopsys IP models.
- Integrate CPU, GPU, PCIe, UCIe, DDR, and peripheral IP models into cohesive virtual platforms.
- Develop SystemC/TLM-2.0 models for custom IP blocks, peripherals, and SoC components.
- Build and maintain virtual prototypes for pre-silicon software development and SoC bring-up.
- Develop automation scripts for VDK assembly, configuration, and validation.
- Translate RTL specifications into SystemC/TLM models in collaboration with hardware design teams.
- Validate models through directed tests, regressions, and co-simulation with RTL.
- Support firmware, driver, and OS teams with early bring-up and debugging using VDKs.
- Optimize model performance, timing accuracy, and simulation speed.
- Document model behavior, APIs, and integration guidelines.
Requirements
- 5+ years of experience in virtual prototyping, SystemC/TLM-2.0 modeling, or pre-silicon software enablement.
- Hands-on experience with Synopsys Virtualizer, Platform Architect, or similar virtual prototyping tools.
- Strong proficiency in SystemC, C++, and TLM-2.0 transaction-level modeling.
- Experience integrating Synopsys IP models such as ARC, PCIe, USB, DDR, and GPU into VDKs.
- Understanding of SoC architecture, including buses, interconnects, interrupts, memory maps, and clock/reset domains.
- Familiarity with embedded software bring-up, including bootloaders, drivers, and OS kernels.
- Experience debugging interactions between models, firmware, and drivers.
- Experience with Synopsys VDK, QEMU, Simics, or other virtual platforms is a plus.
- Exposure to RTL using Verilog or VHDL and co-simulation flows is a plus.
- Knowledge of PCIe, UCIe, CXL, or other high-speed interconnects is a plus.
- Python or Perl scripting experience for automation is a plus.