Principal Software Engineer
Cadence Design Systems2 months ago
Noida, IndiaStaff+
Responsibilities
- Develop maintainable, high-quality C/C++ code for HDL language-based compiler and runtime support.
- Develop HDL compiler front-end functionality for SystemVerilog.
- Support VHDL Language Reference Manual requirements.
- Improve compiler performance and infrastructure.
- Work collaboratively as part of a cross-geography engineering team.
Requirements
- Strong C/C++ software development capabilities.
- Experience or knowledge relevant to HDL compiler and runtime support.
- Exposure to RTL simulation and synthesis is highly desirable.
- Exposure to runtime environments is highly desirable.
About Cadence Design Systems
Cadence Design Systems builds electronic design automation (EDA) software, emulation/acceleration hardware, and reusable IP that help semiconductor and systems companies design, verify, and implement chips and electronic systems. It also develops computational engineering tools, including computational fluid dynamics and molecular modeling for drug discovery. Founded in 1988 and headquartered in San Jose, California, Cadence is a public company listed on NASDAQ under the ticker CDNS.