9 hours ago
London, United KingdomStaff+
Responsibilities
- Lead the design, interfaces, roadmap, and production delivery of a major DX-1 platform firmware area.
- Define interface contracts covering register maps, firmware updates, telemetry flows, and related platform interactions.
- Support pre-silicon, FPGA, silicon bring-up, validation, boot, driver, and management-plane troubleshooting.
- Design fault containment, logging, recovery, and interrupted-firmware-update behavior for rack-scale systems.
- Build reference implementations, firmware tests, validation infrastructure contributions, and device models.
- Identify and resolve high-impact firmware risks at the FPGA and silicon interfaces.
- Develop senior engineers through design reviews and mentoring, and participate in hiring.
Requirements
- Demonstrated depth in bare-metal or RTOS firmware on resource-constrained cores and embedded Linux BSP development, including Yocto/OpenEmbedded, U-Boot or UEFI, drivers, and device tree.
- Strong systems fundamentals involving memory ordering, memory barriers, shared memory, synchronization, interrupt latency, and timing and memory-bandwidth budgets.
- Experience taking firmware through silicon or board bring-up from simulation or emulation and FPGA prototypes through first power-on.
- Experience with rack-scale platform management, OpenBMC or equivalent, Redfish, PLDM over MCTP, I2C/SMBus/PMBus, SPI, UART, power sequencing, and fault isolation.
- Experience with register-level control of an ASIC or large FPGA over a management link, including simulation-model work before silicon exists.
- Technical leadership without formal authority, including specifications, methodologies, tools, and design documents adopted by other teams.
- Precision timing, SerDes or optical link bring-up, and secure boot experience are advantageous.
- Clear technical communication across engineers, managers, and senior leadership, with strong design-document writing.
- Experience across more than one hardware generation or firmware for an ASIC whose tape-out the candidate supported is advantageous.
Benefits
- Meaningful stock options and ownership opportunity.
- Employer-contributed retirement plans.
- Annual Living-Local Bonus for employees living within 20 minutes of the office.
- Salary is described as competitive and commensurate with experience, skills, and location; no specific amount is stated.
Categories
About OLIX
OLIX designs specialized semiconductors and rack-scale systems to accelerate AI token production, re-architecting data centers with dedicated machines, fast interconnects, and optics. Its first product, the Decode Accelerator 1 (DX-1), targets the decode stage of large-model inference to improve throughput and efficiency for hyperscalers and AI platform operators. Privately held and founded in 2024, OLIX recruits across London, Bristol, Austin, Toronto, and San Francisco.