Mythic

Design and advance compiler infrastructure that brings irregular, control-flow-heavy algorithms to Mythic’s novel analog and digital accelerator hardware. This role sits at the intersection of compiler design, high-performance systems, and hardware co-design.

Build and evolve an MLIR-based compiler stack for Mythic’s novel analog AI hardware, including custom dialects, lowering pipelines, and interoperability with PyTorch. This role bridges compiler infrastructure, hardware-aware representations, and specialized accelerator systems.

Build the next generation of machine learning compilers for Mythic’s novel analog AI accelerator. This role combines compiler development, performance optimization, and hardware–software co-design for advanced dataflow architectures.

Join Mythic’s AI Engineering team to develop algorithms and software that adapt, optimize, and deploy neural networks on breakthrough analog AI hardware. You’ll work across software, machine learning, and hardware validation to improve model accuracy, latency, and usability.