Cadence Design Systems

Sr Principal Software Engineer, Innovus — Physical Synthesis & Optimization

Cadence Design Systems
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1 day ago
San Jose, CA, USASenior / Staff+
H1B sponsor

Base Salary

$161k - $299k/yr

Responsibilities

  • Design, implement, unit-test, and optimize high-performance C++ engines for physical synthesis, placement, and timing-driven optimization.
  • Develop graph algorithms, spatial data structures, and continuous or combinatorial optimization techniques for large-scale physical design workloads.
  • Identify and eliminate CPU bottlenecks, memory overhead, and algorithmic scaling limits in production C++ codebases.
  • Translate research concepts and mathematical formulations into robust, maintainable production software.
  • Implement multithreaded and distributed algorithms for computationally intensive implementation engines.
  • Scale workloads across multicore systems and compute clusters while minimizing synchronization and memory-bandwidth constraints.
  • Use profiling and benchmarking tools to improve CPU utilization, cache efficiency, and execution throughput.
  • Develop optimization modules addressing timing, power, performance, area, and congestion.
  • Work with large-scale layout and netlist data and integrate data-driven or AI-assisted optimization heuristics into core synthesis flows.

Requirements

  • Master’s or Ph.D. in Computer Science, Electrical Engineering, Computer Engineering, or a related quantitative field, or equivalent hands-on industry experience.
  • Strong hands-on experience developing high-performance, production-quality C++ in Linux environments.
  • Strong foundations in data structures, graph algorithms, computational geometry, memory management, and software architecture.
  • Practical experience with multithreaded or concurrent programming and low-level performance profiling.
  • Ability to analyze, debug, and optimize complex algorithmic bottlenecks in large-scale software systems.
  • Preferred experience developing EDA tools or working with physical synthesis, placement, static timing analysis, routing, or timing closure.
  • Preferred exposure to machine learning, deep learning, reinforcement learning, or data-driven optimization heuristics.
  • Preferred proficiency with Python, Tcl, or shell scripting for benchmarking and workflow automation.
  • Preferred experience with SIMD vectorization, GPU/CUDA acceleration, or large-scale distributed computing frameworks.

Benefits

  • Annual California base salary range of $161,000 to $299,000, plus possible incentive compensation, bonus, equity, and benefits.
  • Paid vacation and paid holidays.
  • 401(k) plan with employer match.
  • Employee stock purchase plan.
  • Medical, dental, and vision plan options.

Tech Stack

Categories

Cadence Design Systems

About Cadence Design Systems

10,000+ employees

Cadence Design Systems builds electronic design automation (EDA) software, emulation/acceleration hardware, and reusable IP that help semiconductor and systems companies design, verify, and implement chips and electronic systems. It also develops computational engineering tools, including computational fluid dynamics and molecular modeling for drug discovery. Founded in 1988 and headquartered in San Jose, California, Cadence is a public company listed on NASDAQ under the ticker CDNS.

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