Responsibilities
- Develop transaction-level, bit-accurate models of edge NPU architectures with approximate timing and power accuracy.
- Model compute units, interconnects, memory hierarchies, and data movements.
- Simulate representative CNN and Transformer workloads.
- Analyze ML model compute intensity, memory footprint, bandwidth requirements, and operator-level latency.
- Collaborate with compiler and algorithm teams to optimize ML workloads for latency, memory, and power targets.
- Analyze performance bottlenecks and generate actionable architectural recommendations.
Requirements
- Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
- At least 3 years of industry experience in computer architecture and electronic system modeling.
- Strong understanding of computer architecture concepts including memory, cache, DMA, tiling, vectorization, and systolic arrays.
- Strong proficiency in C/C++ and SystemC.
- Preferred: 5+ years of relevant industry experience.
- Preferred: experience building analytical performance and power models for ML accelerators.
About ByteDance
ByteDance is a global incubator of platforms at the cutting edge of commerce, content, entertainment and enterprise services - over 2.5bn people interact with ByteDance products including TikTok. Creation is the core of ByteDance's purpose. Our products are built to help imaginations thrive. This is doubly true of the teams that make our innovations possible. Together, we inspire creativity and enrich life - a mission we aim towards achieving every day. At ByteDance, we create together and grow together. That's how we drive impact - for ourselves, our company, and the users we serve. We are committed to building a safe, healthy and positive online environment for all our users. We have over 110,000 employees based in more than 30 countries globally. Join us.