Senior Firmware Verification Engineer (Python based scripting - PCIe Protocol Feature Validation) - 5-8 Years
Sandisk2 months ago
Bengaluru, IndiaStaff+
Responsibilities
- Define comprehensive verification plans and firmware validation strategies for SSD features and PCIe front-end subsystems.
- Design, develop, integrate, and execute white-box and gray-box tests for firmware products.
- Validate PCIe functionality and compliance, including MMIO address spaces, BARs, resets, interrupts, DMA, error handling, and power management.
- Integrate automated tests across simulation, emulation, and post-silicon validation environments.
- Deploy regression tests, perform failure analysis, debug firmware and integration issues, and drive defects to closure.
- Review test plans, code, firmware trace logs, and debug telemetry for correctness, scalability, and completeness.
- Drive compliance and interoperability testing with endpoint/root-complex devices, switches, and add-in cards.
- Collaborate with architects, firmware engineers, integration teams, and other stakeholders to align validation coverage with product and customer requirements.
- Provide technical leadership through test-strategy definition, technical reviews, mentoring, and validation-readiness activities.
Requirements
- BE/B.Tech or ME/M.Tech degree in CSE, ECE, EEE, IS, or a related field.
- 6–8 years of related experience in firmware verification or system-level testing, including Gen5/Gen6 PCI-SIG protocol testing.
- In-depth knowledge of PCIe Gen3/Gen4/Gen5, with Gen6 preferred, including LTSSM, TLP/DLLP, flow control, ordering rules, error handling, and power management.
- Strong expertise in PCIe protocol, MMIO, BARs, DMA, and ASIC front-end architecture.
- Strong Python scripting and automation skills, with proficiency in Python, C/C++, or Bash.
- Experience with protocol analyzers and exercisers such as Teledyne LeCroy and Keysight.
- Experience with high-performance storage, networking, or compute SoCs.
- Hands-on experience with error injection, fault modeling, and silicon debug tools.
- Familiarity with pre-silicon simulation and emulation as well as post-silicon laboratory validation flows.
- Solid understanding of firmware–hardware interaction and system-level debugging.
- Knowledge of Git and source-code management workflows.
- Demonstrated leadership in test-strategy definition, technical reviews, mentoring, problem-solving, and cross-functional collaboration.