Cadence Design Systems

Firmware Engineer II

Cadence Design Systems
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3 months ago
Austin, TX, USAMid Level
H1B sponsor

Responsibilities

  • Develop bare-metal C firmware and low-level APIs for DDR5 PHY microcontrollers.
  • Collaborate with hardware designers and memory subsystem architects to derive and implement training algorithms.
  • Develop firmware-hardware co-verification plans with the verification team.
  • Develop and debug firmware in RTL-based C and Verilog hardware simulations.
  • Develop and debug firmware on silicon bring-up boards.

Requirements

  • Knowledge of the DDR5 JEDEC specification and different DIMM configurations and specifications.
  • Relevant experience developing bare-metal firmware for high-speed SerDes or memory-interface physical-layer blocks.
  • Knowledge of C programming for embedded software development and experience using a relevant IDE.
  • Ability to debug RTL simulations involving firmware and microcontroller subsystems.
  • Knowledge of Shell, Perl, Python, and TCL scripting.
  • Experience using verification EDA tools, simulators, and waveform viewers.

Tech Stack

CPerlPythonTcl

Categories

Cadence Design Systems

About Cadence Design Systems

10,000+ employees

Cadence Design Systems builds electronic design automation (EDA) software, emulation/acceleration hardware, and reusable IP that help semiconductor and systems companies design, verify, and implement chips and electronic systems. It also develops computational engineering tools, including computational fluid dynamics and molecular modeling for drug discovery. Founded in 1988 and headquartered in San Jose, California, Cadence is a public company listed on NASDAQ under the ticker CDNS.

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