
Astera Labs
Astera Labs builds semiconductor-based connectivity solutions and software that link CPUs, GPUs, memory, and storage for AI and cloud data centers, integrating CXL, PCIe, Ethernet, NVLink, and UALink. It offers standards-based and custom connectivity products alongside its COSMOS software suite, serving hyperscalers and server OEMs. Founded in 2017 and headquartered in San Jose, it is a public company listed on Nasdaq under the ticker ALAB.
Open Positions at Astera Labs
13 open positions
Build and operate the data platforms, test automation, and internal infrastructure that help hardware engineering and manufacturing teams collect trusted data and diagnose failures faster. This hands-on role combines backend software, data engineering, infrastructure operations, and hardware-test support.
Build AI-driven agents and LLM-powered engineering assistants that accelerate RTL design, physical design, static analysis, and formal verification for next-generation semiconductor products. This role combines software engineering, AI applications, and hands-on hardware design and verification knowledge.
Lead the hands-on development of internal automation platforms that streamline access, asset tracking, approvals, and administrative workflows across the company. You will own technical direction while personally building full-stack systems, integrations, and dashboards.
Firmware Engineer responsible for architecting and developing firmware and microcontroller subsystems for advanced SoC and systems products. The role combines embedded software development, hardware-software interface testing, and customer-facing technical collaboration.
Lead the architecture and development of embedded firmware and software for advanced Ethernet retimer and analog connectivity platforms. This principal-level role spans low-level firmware, high-speed link behavior, lab debug, validation, and customer bring-up.
PCIe Firmware Expert developing low-level embedded firmware and SDK capabilities for connectivity silicon powering AI infrastructure. The role spans pre-silicon emulation, post-silicon bring-up, system-level debugging, and customer deployment.
Lead firmware bring-up, validation, and customer issue resolution for Leo CXL Smart Memory Controllers at hyperscale customers and OEM partners. This onsite San Jose role combines embedded firmware development in C and Python with high-speed memory and PCIe/CXL technical engagement.
Lead verification methodology, CAD, and automation across IP and SoC verification teams, building scalable infrastructure that improves regression, coverage, debug, and signoff workflows. The role combines hands-on scripting and verification systems development with technical ownership, cross-team standards, and mentorship.
Own the performance models that shape Astera Labs’ Scorpio Scale-Up Fabric, predicting bandwidth, latency, congestion, and scalability across AI/ML workloads before silicon exists. This high-impact role combines system simulation, fabric architecture, workload analysis, and roadmap influence.
Astera Labs seeks a Senior Performance Engineer to optimize AI workloads on their scale-up fabric, driving performance analysis and benchmarking.
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